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tweak readme

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John Bintz 2024-07-06 14:52:30 -04:00
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@ -17,8 +17,8 @@ Where possible I tried to:
All of these can be built with [Yosys](https://github.com/YosysHQ/yosys) All of these can be built with [Yosys](https://github.com/YosysHQ/yosys)
and tested with [Icarus Verilog](https://github.com/steveicarus/iverilog). The `Makefile` is one I've been dragging along across all projects. It can fire off both a build-and-install to the Go Board, as well as run the test suite and open up [GTKWave](https://gtkwave.sourceforge.net/) and tested with [Icarus Verilog](https://github.com/steveicarus/iverilog). The `Makefile` is one I've been dragging along across all projects. It can fire off both a build-and-install to the Go Board, as well as run the test suite and open up [GTKWave](https://gtkwave.sourceforge.net/)
so you can inspect the signals. You do not need Lattive iCECube2 and you will have a hard time so you can inspect the signals. You do not need Lattice iCECube2 or jump therough their
getting it to run on modern Linux anyway! licensing hoops, and you will have a hard time getting it to run on modern Linux anyway!
`sipo_shift_register_test.sv` shows how to create your own `assert` for Icarus Verilog, `sipo_shift_register_test.sv` shows how to create your own `assert` for Icarus Verilog,
taken from an idea from here: https://stackoverflow.com/a/13906120 taken from an idea from here: https://stackoverflow.com/a/13906120