54 lines
1.2 KiB
Verilog
54 lines
1.2 KiB
Verilog
// Keys off of HSync and VSync signals to get the actual electron
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// beam position
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module VGA_Current_Beam_Position(
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input i_Clk,
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input i_HSync,
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input i_VSync,
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output reg o_HSync = 0,
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output reg o_VSync = 0,
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output reg [$clog2(TOTAL_COLUMNS)-1:0] o_X,
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output reg [$clog2(TOTAL_ROWS)-1:0] o_Y,
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output o_IsActiveArea
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);
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parameter TOTAL_COLUMNS = 800;
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parameter TOTAL_ROWS = 525;
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parameter ACTIVE_COLUMNS = 640;
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parameter ACTIVE_ROWS = 480;
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wire w_frameStart;
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// forward these flip-flop style. use these instead of what
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// comes out of sync pulse generator!
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always @(posedge i_Clk) begin
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o_VSync <= i_VSync;
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o_HSync <= i_HSync;
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end
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always @(posedge i_Clk) begin
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if (w_frameStart == 1) begin
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o_X <= 0;
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o_Y <= 0;
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end else begin
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if (o_X == TOTAL_COLUMNS - 1) begin
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o_X <= 0;
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if (o_Y == TOTAL_ROWS - 1) begin
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o_Y <= 0;
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end else begin
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o_Y <= o_Y + 1;
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end
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end else begin
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o_X <= o_X + 1;
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end
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end
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end
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// rising vsync == new frame
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assign w_frameStart = (~o_VSync & i_VSync);
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assign o_IsActiveArea = (o_X < ACTIVE_COLUMNS && o_Y < ACTIVE_COLUMNS);
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endmodule
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