60 lines
1.4 KiB
Verilog
60 lines
1.4 KiB
Verilog
/**
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* Paddles maintain their own location on the screen
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*/
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module PongPaddle (
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input i_Clk,
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input [5:0] i_CellX,
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input [5:0] i_CellY,
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input i_PaddleUp,
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input i_PaddleDown,
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output reg o_DoDrawPaddle,
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output reg [5:0] o_PaddleY
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);
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parameter X_POS_CELLS = 0;
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parameter PADDLE_HEIGHT_CELLS = 6;
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parameter SCREEN_HEIGHT_CELLS = 30;
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parameter CLOCKS_PER_SECOND = 25000000;
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parameter PADDLE_MOVE_TIME_MS = 50;
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// omg i can't get this
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parameter integer PADDLE_SPEED = 1250000;
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reg [$clog2(PADDLE_SPEED)-1:0] r_paddleMoveCount;
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wire w_onlyOneButtonDown = i_PaddleUp ^ i_PaddleDown;
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always @(posedge i_Clk) begin
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// handle end of move delay
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if (w_onlyOneButtonDown) begin
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if (r_paddleMoveCount == PADDLE_SPEED) begin
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r_paddleMoveCount <= 0;
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end else begin
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r_paddleMoveCount <= r_paddleMoveCount + 1;
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end
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end
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if (
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i_PaddleUp &&
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r_paddleMoveCount == PADDLE_SPEED &&
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o_PaddleY > 0
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) begin
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o_PaddleY <= o_PaddleY - 1;
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end else if (
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i_PaddleDown &&
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r_paddleMoveCount == PADDLE_SPEED &&
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o_PaddleY < SCREEN_HEIGHT_CELLS - PADDLE_HEIGHT_CELLS - 1
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) begin
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o_PaddleY <= o_PaddleY + 1;
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end
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if (
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i_CellX == X_POS_CELLS &&
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i_CellY >= o_PaddleY &&
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i_CellY <= o_PaddleY + PADDLE_HEIGHT_CELLS) begin
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o_DoDrawPaddle <= 1;
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end else begin
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o_DoDrawPaddle <= 0;
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end
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end
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endmodule
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