95 lines
1.7 KiB
Verilog
95 lines
1.7 KiB
Verilog
module ImageIndexToColor(
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input i_Clk,
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input [4:0] i_ColorIndex,
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input i_DoWrite,
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input [3:0] i_WriteColorIndex,
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input [2:0] i_WriteColor_Red,
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input [2:0] i_WriteColor_Green,
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input [2:0] i_WriteColor_Blue,
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output [2:0] o_Red,
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output [2:0] o_Green,
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output [2:0] o_Blue,
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output reg o_WriteComplete
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);
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reg [8:0] r_colors[0:31];
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initial begin
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$readmemb("palette_data.txt", r_colors);
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end
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always @(posedge i_Clk) begin
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if (i_DoWrite) begin
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r_colors[i_WriteColorIndex] <= {
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i_WriteColor_Red, i_WriteColor_Green, i_WriteColor_Blue
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};
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o_WriteComplete <= i_DoWrite;
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end
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end
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assign o_Red = r_colors[i_ColorIndex][8:6];
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assign o_Green = r_colors[i_ColorIndex][5:3];
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assign o_Blue = r_colors[i_ColorIndex][2:0];
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endmodule
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module TestImageIndexToColor();
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reg i_Clk = 0;
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always #2 i_Clk <= !i_Clk;
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reg [3:0] r_colorIndex = 0;
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wire [2:0] w_Red, w_Green, w_Blue;
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wire w_writeComplete;
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reg r_doWrite = 0;
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reg [2:0] r_WriteColor_Red = 3'b111;
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reg [2:0] r_WriteColor_Green = 3'b000;
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reg [2:0] r_WriteColor_Blue = 3'b001;
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reg [3:0] r_writeColorIndex = 0;
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ImageIndexToColor ii2c (
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.i_Clk(i_Clk),
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.i_ColorIndex(r_colorIndex),
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.i_DoWrite(r_doWrite),
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.i_WriteColorIndex(r_writeColorIndex),
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.i_WriteColor_Red(r_WriteColor_Red),
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.i_WriteColor_Green(r_WriteColor_Green),
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.i_WriteColor_Blue(r_WriteColor_Blue),
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.o_Red(w_Red),
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.o_Green(w_Green),
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.o_Blue(w_Blue),
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.o_WriteComplete(w_writeComplete)
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);
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initial begin
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$dumpfile("test.vcd");
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$dumpvars;
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#2;
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#2;
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r_colorIndex = 1;
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#2;
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#2;
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r_doWrite = 1;
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#2;
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#2;
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r_colorIndex = 15;
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#2;
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#2;
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$finish;
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end
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endmodule
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