module LFSR(
  input i_Clk,
  output [SIZE-1:0] o_LFSR_Data,
  output o_LFSR_Done
);
  parameter SIZE = 22;

  reg [SIZE-1:0] r_LFSR;
  wire w_XNOR;

  always  @(posedge i_Clk) begin
    r_LFSR <= {r_LFSR[SIZE-2:0], w_XNOR};
  end

  assign w_XNOR = r_LFSR[SIZE-1] ^~ r_LFSR[SIZE-2];
  assign o_LFSR_Done = (r_LFSR == 0);
  assign o_LFSR_Data = r_LFSR;
endmodule