module ImageRAM(
  input i_Clk,

  input i_doRead,
  input [$clog2(WIDTH)-1:0] i_ReadX,
  input [$clog2(HEIGHT)-1:0] i_ReadY,

  input [$clog2(WIDTH)-1:0] i_WriteX,
  input [$clog2(HEIGHT)-1:0] i_WriteY,
  input [$clog2(INDEXES)-1:0] i_WriteData,
  input i_DoWrite,

  output reg o_ReadDataReady,
  output reg [4:0] o_ReadData,

  output reg o_WriteComplete
);
  parameter INDEXES = 8;
  parameter WIDTH = 80;
  parameter HEIGHT = 60;

  reg [4:0] r_Memory[0:HEIGHT-1][0:WIDTH-1];

  initial begin
    $readmemb("image_data.txt", r_Memory);
  end

  // reading
  always @(posedge i_Clk) begin
    o_ReadData <= r_Memory[i_ReadY][i_ReadX];
    o_ReadDataReady <= i_doRead;
  end

  // writing
  always @(posedge i_Clk) begin
    if (i_DoWrite) begin
      r_Memory[i_WriteY][i_WriteX] <= i_WriteData;
      o_WriteComplete <= i_DoWrite;
    end
  end
endmodule

module TestImageRAM();
  reg r_Clk = 0;
  always #2 r_Clk <= !r_Clk;

  reg r_doRead = 0;

  reg [5:0] r_readX = 0;
  reg [4:0] r_readY = 0;

  wire w_readDataReady;
  wire [2:0] w_readData;

  ImageRAM MyRam (
    .i_Clk(r_Clk),
    .i_doRead(r_doRead),
    .i_ReadX(r_readX),
    .i_ReadY(r_readY),
    .o_ReadDataReady(w_readDataReady),
    .o_ReadData(w_readData)
  );

  initial begin
    $dumpfile("test.vcd");
    $dumpvars;

    #2;
    #2;

    r_doRead <= 1;

    #2;
    #2;

    r_doRead <= 0;
    r_readX <= 1;
    r_readY <= 0;

    #2;
    #2;

    r_doRead <= 1;

    #2;
    #2;

    r_doRead <= 0;

    $finish;
  end
endmodule