# Go Board code reworking

This code is a reworking of the code for the [Go Board](https://nandland.com/the-go-board/)
FPGA beginner's board.

The original code comes from two sources:

* [Nandland Go Board tutorials](https://nandland.com/download-and-install-the-fpga-tools-and-drivers/)
* [Getting Started with FPGAs repo](https://github.com/nandland/getting-started-with-fpgas/)

Where possible I tried to:

* use more consistent variable and constant names
* fix missing inferred wires (the Pong project had a lot of these)
* avoid run-on lines of code
* avoid one-liner conditional bodies, opting for `begin...end` blocks everywhere

All of these can be built with [Yosys](https://github.com/YosysHQ/yosys)
and tested with [Icarus Verilog](https://github.com/steveicarus/iverilog). The `Makefile` is one I've been dragging along across all projects. It can fire off both a build-and-install to the Go Board, as well as run the test suite and open up [GTKWave](https://gtkwave.sourceforge.net/)
so you can inspect the signals. You do not need Lattice iCECube2 or have to jump through their
licensing hoops, and you will have a hard time getting it to run on modern Linux anyway!

`sipo_shift_register_test.sv` shows how to create your own `assert` for Icarus Verilog,
taken from an idea from here: https://stackoverflow.com/a/13906120

Have fun.

John