52 lines
1.7 KiB
OpenEdge ABL
52 lines
1.7 KiB
OpenEdge ABL
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IFND HARDWARE_INTBITS_I
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HARDWARE_INTBITS_I SET 1
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**
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** $Filename: hardware/intbits.i $
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** $Release: 1.3 $
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**
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** bits in the interrupt enable (and interrupt request) register
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**
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** (C) Copyright 1985,1986,1987,1988 Commodore-Amiga, Inc.
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** All Rights Reserved
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**
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INTB_SETCLR EQU (15) ;Set/Clear control bit. Determines if bits
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;written with a 1 get set or cleared. Bits
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;written with a zero are allways unchanged.
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INTB_INTEN EQU (14) ;Master interrupt (enable only )
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INTB_EXTER EQU (13) ;External interrupt
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INTB_DSKSYNC EQU (12) ;Disk re-SYNChronized
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INTB_RBF EQU (11) ;serial port Receive Buffer Full
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INTB_AUD3 EQU (10) ;Audio channel 3 block finished
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INTB_AUD2 EQU (9) ;Audio channel 2 block finished
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INTB_AUD1 EQU (8) ;Audio channel 1 block finished
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INTB_AUD0 EQU (7) ;Audio channel 0 block finished
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INTB_BLIT EQU (6) ;Blitter finished
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INTB_VERTB EQU (5) ;start of Vertical Blank
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INTB_COPER EQU (4) ;Coprocessor
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INTB_PORTS EQU (3) ;I/O Ports and timers
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INTB_SOFTINT EQU (2) ;software interrupt request
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INTB_DSKBLK EQU (1) ;Disk Block done
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INTB_TBE EQU (0) ;serial port Transmit Buffer Empty
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INTF_SETCLR EQU (1<<15)
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INTF_INTEN EQU (1<<14)
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INTF_EXTER EQU (1<<13)
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INTF_DSKSYNC EQU (1<<12)
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INTF_RBF EQU (1<<11)
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INTF_AUD3 EQU (1<<10)
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INTF_AUD2 EQU (1<<9)
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INTF_AUD1 EQU (1<<8)
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INTF_AUD0 EQU (1<<7)
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INTF_BLIT EQU (1<<6)
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INTF_VERTB EQU (1<<5)
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INTF_COPER EQU (1<<4)
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INTF_PORTS EQU (1<<3)
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INTF_SOFTINT EQU (1<<2)
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INTF_DSKBLK EQU (1<<1)
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INTF_TBE EQU (1<<0)
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ENDC ; HARDWARE_INTBITS_I
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